Syed Mohsin Abbas, PhD

Postdoctoral Researcher

Integrated Systems for Information Processing (ISIP) Lab

McGill University, Canada.

Email: (1) syed.abbas@mail.mcgill.ca

(2) smabbas@connect.ust.hk

I am currently working as a postdoctoral researcher at Integrated Systems for Information Processing (ISIP) Lab at McGill University, Canada. At McGill, I am working with Prof. Warren J. Gross. I received my Ph.D. in 2017, from the Department of Electronics and Computer Engineering (ECE) at the Hong Kong University of Science and Technology (HKUST) under Prof. Chi-Ying Tsui's supervision.

My research interests include the development of high-throughput and energy-efficient VLSI architectures for modern channel code decoders but are not limited to them. In addition, my curiosity is fueled by topics such as information theory, VLSI Design, Massive MIMO, 4G-LTE, and 5G NR.

During my postdoctoral fellowship at McGill University, I investigated universal decoding schemes for short-length and high-rate channel codes. More specifically, I am exploring the Guessing Random Additive Noise Decoding (GRAND) technique, which is a recently proposed universal Maximum Likelihood (ML) decoder for short-length and high-rate linear block code.

During my Ph.D. studies at the Hong Kong University of Science and Technology (HKUST), I investigated techniques for reducing computational complexity as well as decoding latency for Belief Propagation Decoding (BPD) of polar codes.