Syed Mohsin Abbas, PhD

Postdoctoral Researcher

Integrated Systems for Information Processing (ISIP) Lab

McGill University, Canada.

Email: (1) syed.abbas@mail.mcgill.ca

(2) smabbas@connect.ust.hk

I am currently working as a postdoctoral researcher at Integrated Systems for Information Processing (ISIP) Lab at McGill University, Canada. At McGill, I am working with Prof. Warren J. Gross. I received my Ph.D. in 2017, from the Department of Electronics and Computer Engineering (ECE) at the Hong Kong University of Science and Technology (HKUST) under Prof. Chi-Ying Tsui's supervision.

The research includes, but not limited to, designing high throughput channel code (Polar/LDPC) decoders for next-generation communication systems. Moreover, topics such as information theory, digital VLSI design, Massive MIMO, 4G-LET, and 5G NR also ignite my interest.